1. Field of the Invention
The present invention relates to a brushless motor driver applicable to an acoustic apparatus and an image apparatus and the like.
2. Description of the Background Art
FIG. 4 is a circuit diagram showing a conventional brushless motor driver. As shown in FIG. 4, a brushless motor 1 has three phase driving coils 2a, 2b and 2c and a rotor (not shown), and driving transistors Q21, Q22, Q25, Q26, Q29 and Q30 are provided for controlling feed with respect to the driving coils 2a, 2b and 2c. The driving transistors Q21, Q25 and Q29 arranged at an upper side are NPN transistors respectively, whose collectors are tied together to connect with a positive feed terminal 3 of a power source V.sub.CC. On the other hand, the driving transistors Q22, Q26 and Q30 arranged at a lower side are NPN transistors respectively, whose emitters are tied together to connect with a reverse input terminal of a control amplifier A1 and ground (negative feed terminal) through a resistance R11. An emitter of the driving transistor Q21 is connected with a collector of the driving transistor Q22, and the node between the both transistors Q21 and Q22 is connected with the driving coil 2a. An emitter of the drivIng transistor Q25 is connected with a collector of the driving transistor Q26, and the node between the both transistors Q25 and Q26 is connected with the driving coil 2b. An emitter of the driving transistor Q29 is connected with a collector of the driving transistor Q30, and the node between the both transistors Q29 and Q30 is connected with the driving coil 2c.
Terminals 4 to 9 are provided for inputting sensor signals H.sub.U.sup.+, H.sub.U.sup.-, H.sub.V.sup.+, H.sub.V.sup.-, H.sub.W.sup.+ and H.sub.W.sup.- as shown in FIG. 5 respectively, sensor signals H.sub.U.sup.+, H.sub.U.sup.-, H.sub.V.sup.+, H.sub.V.sup.-, H.sub.W.sup.+ and H.sub.W.sup.- being produced by well known technique on the basis of rotating angle of the rotor. The sensor signals H.sub.U.sup.+, H.sub.V.sup.+, H.sub.W.sup.+ are 120 degrees out-of-phase each other, while the sensor signals H.sub.U.sup.-, H.sub.V.sup.-, and H.sub.W.sup.- are 180 degrees out-of-phase with the sensor signals H.sub.U.sup.+, H.sub.V.sup.+ and H.sub.W.sup.+ respectively. The terminals 4 and 5 are respectively connected with bases of NPN transistors Q1 and Q2 making up a differential transistor pair, and emitters of the transistors Q1 and Q2 are tied together to connect with ground through a constant current source 10. The terminals 6 and 7 are respectively connected with bases of NPN transistors Q4 and Q5 making up a differential transistor pair, and emitters of the transistors Q4 and Q5 are tied together to connect with ground through a constant current source 11. The terminals 8 and 9 are respectively connected with bases of NPN transistors Q7 and Q8 making up a differential transistor pair, and emitters of the transistors Q7 and Q8 are tied together to connect with ground through a constant current source 12.
A collector of the transistor Q1 is connected with a collector and a base of a PNP transistor Q3 and a base of a PNP transistor Q12, and emitters of the transistors Q3 and Q12 are connected With the positive feed terminal 3 respectively, thus the transistors Q3 and Q12 make up a current mirror circuit. A collector of the transistor Q4 is connected with a collector and a base of a PNP transistor Q6 and a base of a PNP transistor Q11, and emitters of the transistors Q6 and Q11 are connected With the positive feed terminal 3 respectively, thus the transistors Q6 and Q11 make up a current mirror circuit. A collector of the transistor Q7 is connected with a collector and a base of a PNP transistor Q9 and a base of a PNP transistor Q10, and emitters of the transistors Q9 and Q10 are connected with the positive feed terminal 3 respectively, thus the transistors Q9 and Q10 make up a current mirror circuit. Collectors of the transistors Q2 and Q9 are tied together, and collectors of the transistors Q5 and Q3 are tied together while collectors of the transistors Q8 and Q6 are tied together. A collector of the transistor Q10 is connected with ground through a resistance R1, and a collector of the transistor Q11 is connected with ground through a resistance R2 while a collector of the transistor Q12 is connected with ground through a resistance R3.
In the above circuit, a current corresponding to the one obtained by adding a current flowing in the transistor Q1 and a current flowing in the transistor Q5 flows the resistance R3 through the transistors Q3 and Q12 making up the current mirror circuit, and a voltage developed by a voltage drop across the resistance R3 can be outputted from a node N1 as an output voltage for U phase. Similarly, a current corresponding to the one obtained by adding a current flowing in the transistor Q4 and a current flowing in the transisor Q8 flows the resistance R2 through the transistors Q6 and Q11 making up the current mirror circuit, and a voltage developed by a voltage drop across the resistance R2 can be outputted from a node N2 as an output voltage for V phase. Further, a current corresponding to the one obtained by adding a current flowing in the transistor Q7 and a current flowing in the transistor Q2 flows the resistance R1 through the transistors Q9 and Q10 making up the current mirror circuit, and a voltage developed by a voltage drop across the resistnace R1 can be outputted from a node N3 as an output voltage for W phase. Incidentally, a waveform synthetic circuit 13 consists of the terminals 4 9, to the transistors Q1 to Q12, the resistances R1 to R3 and the constant current sources 10 to 12.
The node N1 developed the output voltage for U phase is connected with both bases of a PNP transistor Q13 and an NPN transistor Q14, and the node N2 developed the output voltage for V phase is connected with both bases of a PNP transistor Q15 and an NPN transistor Q16, while the node N3 developed the output voltage for W phase is connected with both bases of a PNP transistor Q17 and an NPN transistor Q18. Emitters of the transistors Q13, Q15 and Q17 tied together are connected with the positive feed terminal 3 through a constant current source 14, and collectors of the transistors Q13, Q18 and Q17 are respectively connected with bases of the driving transistors Q22, Q26 and Q30 arranged at lower side. Resistances R7, R8 and R9 are connected between collectors and emitters of the driving transistors Q22, Q26 and Q30 respectively. Thus, acitvities of the transistors Q13, Q15 and Q17 are controled on the basis of the output voltage of the nodes N1, N2 and N3 respectively to selectively supply a current of the constant current source 14 to the bases of the driving transistors Q22, Q26 and Q30 and the resistances R7, R8 and R9, so that the activities of the driving transistors Q22, Q26 and Q30 can be controled.
On the other hand, emitters of the transistors Q14, Q16 and Q18 are tied together to connect with ground through a constant current source 15. A collector of the transistor Q14 is connected with a base and a collector of a PNP transistor Q19 and a base of a PNP transistor Q20, and emitters of the transistors Q19 and Q20 are connected with the positive feed terminal respectively, thus the transistors Q19 and Q20 consist of a current mirror circuit. A collector of the transistor 020 is connected with a base of the driving transistor Q21 while being connected with an emitter of the driving transistor Q21 through a resistance R4. A collector of the transistor Q16 is connected with a base and a collector of a PNP transistor Q23 and a base of a PNP transistor Q24, and emItters of the transistors Q23 and Q24 are connected with the positive feed terminal 3 respectively, thus the transistors Q23 and Q24 consist of a current mirror circuit. A collector of the transistor Q24 is connected with a base of the driving transistor Q25 while being connected with an emitter of the driving transistor Q25 through a resistance R5. A collector of the transistor Q18 is connected with a base and a collector of a PNP transistor Q27 and a base of a PNP transistor Q28, and emitters of the transistors Q27 and Q28 are connected with the positive feed terminal 3, thus the transistors Q27 and Q28 consist of a current mirror circuit. A collector of the transistor Q28 is connected with a base of the driving transistor Q29 while being connected with an emItter of the driving transistor Q29 through a resistance R6. Thus activates of the transistors Q14, Q16 and Q18 are controled on the basis of the output voltage of the nodes N1, N2 and N3 respectively to selectively supply a current absorbed by the constant current source 15 to the transistors Q19, Q23 and Q27, to thereby selectively supply a current corresponding to the current flowing in the transistors Q19, Q23 and Q27 to the bases of the driving transistors Q21, Q25 and Q29 and the resistances R4, R5 and R6 through the transistors Q20, Q24 and Q28, so that the activates of the driving transistors Q21, Q25 and Q29 can be controled.
In the control amplifier A1, a torque command V.sub.T is applied to a nonreverse input terminal thereof from a terminal 16. The control amplifier A1 acts to adjust amount of current I.sub.CTL flowing in each of the constant current sources 14 and 15 so that a voltage R.sub.F across the resistance R11 is the same with the voltage of the torque command V.sub.T. Incidentally, the resistnace 10 is provided for setting a DC-gain of the control amplifier A1 in cooperation with the resistance R11.
The operation of the conventional brushless motor driver having the above structure will be explained below.
The sensor signals H.sub.U.sup.+, H.sub.U.sup.-, H.sub.V.sup.+, H.sub.V.sup.-, H.sub.W .sup.+, and H.sub.W.sup.- as shown in FIG. 5 are applied to the terminal 4 to 9 of the waveform synthetic circuit 13 in relation to the rotating angle .theta..sub.E of the rotor. As a result, a current I.sub.O of the constant current source 10 is delivered to the transistors Q3 and Q9 in the manner of proportioning to the base-to-emitter voltages of the transistors Q1 and Q2 making up the differential transistor pair. Further, a current I.sub.O of the constant current source 11 is delivered to the transistors Q6 and Q3 in the manner of proportioning to the base-to-emitter voltages of the transistors Q4 and Q5 making up the differential transistor pair. Moreover, a current I.sub.O of the constant current source 12 is delivered to the transistors Q9 and Q6 in the manner of proportioning to the base-to-emitter voltages of the transistors Q7 and Q8 making up the differential transistor pair. Thus, the current corresponding to the one obtained by adding the current flowing in the transistor Q1 and the current flowing in the transistor Q5 flows the resistance R3 through the transistors Q3 and Q12 making up the current mirror circuit, to thereby set the potential of the node N1. Further, the current corresponding to the one obtained by adding the current flowing in the transistor Q4 and the current flowing in the transistor Q8 flows the resistance R2 through the transistors Q6 and Q11 making up the current mirror circuit, to thereby set the potential of the node N2. Moreover, the current corresponding to the one obtained by adding the current flowing in the transistor Q7 and the current flowing in the transistors Q2 flows the resistance R1 through the transistors Q9 and Q10 making up the current mirror circuit, to thereby set the potential of the node N3.
Consequently, the potential of the node N1 is "H" when the voltages of the sensor signals H.sub.U.sup.+, H.sub.U.sup.-, H.sub.V.sup.+ and H.sub.V.sup.- have the relation of H.sub.U.sup.+ &gt;H.sub.U.sup.-, H.sub.V.sup.- &gt;H.sub.V.sup.+ (namely, the rotating angle .theta..sub.E is within the range from 0.degree. to 120.degree.), while being "L" when the voltages of the sensor signals H.sub.U.sup.+, H.sub.U.sup.-, H.sub.V.sup.- and H.sub.V.sup.+ have the relation of H.sub.U.sup.+ &lt;H.sub.U.sup.-, H.sub.V.sup.- &lt;H.sub.V.sup.+ (namely, the rotating angle .theta..sub.E is within the range from 180.degree. to 300.degree.). When the level of the node N1 is "H", the transistor Q14 conducts to supply the current corresponding to the current flowing in the transistor Q14 to the base of the driving transistor Q21 and the resistnace R4 through transistor Q19 and Q20 making up the current mirror circuit, so that the driving transistor Q21 is conducted. On the other hand, when the level of the node N2 is "L", the transistor Q13 conducts to supply a current to the base of the driving transistor Q22 and the resistnace R7, so that the driving transistor Q22 is conducted.
Similarly, the potential of the node N2 is "H" when the voltages of the sensor signals H.sub.V.sup.+, H.sub.V.sup.-, H.sub.W.sup.+ and H.sub.W.sup.- have the relation of H.sub.V.sup.+ &gt;H.sub.V.sup.-, H.sub.W.sup.- &gt;H.sub.W.sup.+ (namely, the rotating angle .theta..sub.E is within the range from 120.degree. to 240.degree.), so that the driving transistor Q25 is conducted through the transistors Q16, Q23 and Q24. On the other hand, the potential of the node N2 is "L" when the voltages of the sensor signals H.sub.V.sup.+, H.sub.V.sup.-, H.sub.W.sup.+ and H.sub.W.sup.- have the relation of H.sub.V.sup.+ &lt;H.sub.V.sup.-, H.sub.W.sup.- &lt;H.sub.W.sup.+ (namely, the rotating angle .theta..sub.E is within the range from 0.degree. to 60.degree. and 300.degree. to 360.degree.), so that the driving transistor Q26 is conducted through the transistors Q15.
Similarly, the potential of the node N3 is "H" when the voltages of the sensor signals H.sub.W.sup.+, H.sub.W.sup.-, H.sub.U.sup.+ and H.sub.U.sup.- have the relation of H.sub.W.sup.+ &gt;H.sub.W.sup.-, H.sub.U.sup.- &gt;H.sub.U.sup.+ (namely, the rotating angle .theta..sub.E is within the range from 240.degree. to 360.degree.), so that the driving transistor Q29 is conducted through the transistor Q18, Q27 and Q28. On the other hand, the potential of the node N3 is "L" when the voltages of the sensor signals H.sub.W.sup.+, H.sub.W.sup.-, H.sub.U.sup.+ and H.sub.U.sup.- have the relation of H.sub.W.sup.+ &lt;H.sub.W.sup.-, H.sub.U.sup.- &lt;H.sub.U.sup.+ (namely, the rotating angle .theta..sub.E is with in the range from 60.degree. to 180.degree.), so that the driving transistor Q30 is conducted through the transistor Q17.
Thus, the driving transistors Q21, Q25 and Q29 arranged at the upper side and the driving transistors Q22, Q26 and Q30 arranged at the lower side are sequentially conducted by switching every rotating angle 120.degree. on the basis of the sensor signals H.sub.U.sup.+, H.sub.U.sup.-, H.sub.V.sup.+, H.sub.V.sup.-, H.sub.W.sup.+ and H.sub.W.sup.-, whereby the current sequentially flows to driving coils 2a, 2b and 2c so as to be obtained a rotating magnetic field for producing a turning effort.
A table of energized state will be shown below.
______________________________________ energized energized direction energized driving driving of rotating state transistor coil current angle ______________________________________ 1 Q21, Q26 2a, 2b 1 60.degree. 2 Q21, Q30 2a, 2c 2 120.degree. 3 Q25, Q30 2b, 2c 3 180.degree. 4 Q25, Q22 2a, 2b 4 240.degree. 5 Q29, Q22 2a, 2c 5 300.degree. 6 Q29, Q26 2b, 2c 6 360.degree. ______________________________________
The motor is driven by repeating the above energized state 1 to 6. FIG. 6 shows the current inflow-outflow state of the brushless motor 1 in U phase, V phase and W phase.
In the above brushless motor driver, the currents I.sub.CTL of the constant current sources 14 and 15 are adjusted by the control amplifier A1 so that a driving current corresponding to the torque command V.sub.T flows to the driving coils 2a, 2b, and 2c. Namely, when the voltage of the torque command V.sub.T rises, the currents I.sub.CTL of the constant current sources 14 and 15 are increased by the operation of the control amplifier A1, whereby the base currents of the driving transistors Q21, Q22, Q25, Q26, Q29 and Q30 are increased to increase the driving current flowing in the driving coils 2a, 2b and 2c. The driving current causes the voltage R.sub.F to rise by flowing in the resistance R11. When the voltage R.sub.F becomes the same with the voltage of the torque command V.sub.T, the increase of the current I.sub.CTL by the control amplifier A1 is ceased for supplying the driving current corresponding to the torque command V.sub.T to the driving coils 2a, 2b and 2c. Similarly, when the voltage of the torque command V.sub.T reduces, the currents I.sub.CTL of the constant current sources 14 and 15 are decreased by the operation of the control amplifier A1, whereby the base currents of the driving transistors Q21, Q22, Q25, Q26, Q29 and Q30 are decreased to decrease the driving current flowing in the driving coils 2a, 2b and 2c. The driving current causes the voltage R.sub.F to reduce by flowing in the resistance R11. When the voltage R.sub.F becomes the same with the voltage of the torque command V.sub.T, the decrease of the current I.sub.CTL by the control amplifier A1 is ceased for supplying the driving current corresponding to the torque command V.sub.T to the driving coils 2a, 2b and 2c.
However, such a conventional brushless motor driver has the following disadvantages. Namely, since the driving current flowing in the motor 1 depends on only the voltage of the torque command V.sub.T and the voltage R.sub.F across the resistance R11, the driving transistors Q21, Q22, Q25, Q26, Q29 and Q30 always enter into a saturation area irrespective of the value of the torque command V.sub.T, to thereby deteriorate a running efficiency and make noise.